Hierarchical clock routing scheme for multi-chip modules based on area pad interconnection /
Qing Zhu, Wayne W.M. Dai

APA Citation

Zhu, J., Dai, W. Wei-Ming., University of California, S. Cruz. Computer Research Laboratory. (1993). Hierarchical clock routing scheme for multi-chip modules based on area pad interconnection. Santa Cruz, CA: Computer Research Laboratory, University of California, Santa Cruz.

MLA Citation

Zhu, Jing, Wayne Wei-Ming Dai, and Santa Cruz. Computer Research Laboratory University of California. Hierarchical Clock Routing Scheme for Multi-chip Modules Based On Area Pad Interconnection. Santa Cruz, CA: Computer Research Laboratory, University of California, Santa Cruz, 1993.