Perfect-balance planar clock routing with minimal path length

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035 ⊔ ⊔ ‡asdr-ucsc.b18946513
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090 ⊔ ⊔ ‡aQA75.5. ‡b.T43 1993:17
035 ⊔ ⊔ ‡a(OCoLC)32148676
100 1 ⊔ ‡aZhu, Jing
245 1 0 ‡aPerfect-balance planar clock routing with minimal path length / ‡cQing Zhu, Wayne W.M. Dai
260 ⊔ ⊔ ‡aSanta Cruz, CA : ‡bComputer Research Laboratory, University of California, Santa Cruz, ‡c[1993]
300 ⊔ ⊔ ‡a26 p. : ‡bill. ; ‡c28 cm
490 0 ⊔ ‡aTechnical report / Computer Research Laboratory, UCSC ; ‡vUCSC-CRL-93-17
538 ⊔ ⊔ ‡aMode of access: Internet.
650 ⊔ 0 ‡aSteiner systems
650 ⊔ 0 ‡aComputer algorithms
650 ⊔ 0 ‡aIntegrated circuits ‡xVery large scale integration ‡xDesign and contruction
650 ⊔ 0 ‡aTiming circuits ‡xDesign and construction
700 1 ⊔ ‡aDai, Wayne Wei-Ming
710 2 ⊔ ‡aUniversity of California, Santa Cruz. ‡bComputer Research Laboratory
CID ⊔ ⊔ ‡a008316739
DAT 0 ⊔ ‡a19960522120244.0 ‡b20111212000000.0
DAT 1 ⊔ ‡a20120815095258.0 ‡b2024-05-04T17:55:09Z
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